diference netwen testbench and design files
Verification Engineer Interview Questions
3,718 verification engineer interview questions shared by candidates
You have a black box which sorts 2 numbers: big and small (an ouput of a box: smallest and highest) The question has two sections: Section A: Create a system which sorts 4 numbers
Section B: Make your previous system to sort 5 numbers:
Make a counter design with code
they give me a code in assembly , was a problem in the code and I asked to fined the problem
question about Logic design FIFO related questions were asked: what requirements will be needed from designer, what will be the test points, coverage points, assertion checks Regarding Technical skills I don't have any difficulties and regarding job location to change from Bangalore can be difficult Few puzzles and Projects in my resume
1. In a certain protocol why the ready signal is inout instead of out? 2. About the refresh in DDR2 3. FSM 4. System Verilog, Verilog, C, Perl, (also questions about OOP) 5. Bit operation
how does fork-join,join_any etc work
1. reverse linked list 2. calculate tree depth. 3. build a chip for sorting 4 elements by using a chip of sorting 2 elemnts.
Design a system to test a memory device integrity over time.
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