7. Majorly on projects done
Senior Asic Design Engineer Interview Questions
50 senior asic design engineer interview questions shared by candidates
1. FSM design and comparision of FSM state encoding techniques
What is crosstalk delay and how to fix?
Unexpected: Depth of a couple of technical questions in terms of layers of complexities. With every solution, a wrinkle is added. Real problems are complex, and some times not in the field of candidates background.
Related to SV + UVM + Puzzles + Perl and other scripting language
Complete interview was based on Verilog and Digital Electronics There were three interview rounds one technical,one managerial(which people say ) (especially covering the resume)and third HR round
Can't remember.
Difference Between Associative array and Dynamic Arrya
Nothing really, some pros/cons of different physical verification tools, how to filter through 100k+ errors, how to solve chip level LVS issues. Should be easy for experience engineers to answer.
What did you do in the past, how to implement low power design, how to build CTS, how to do STA
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