Interview questions were on core electronics concepts. Digital electronics mainly
Digital Asic Design Engineer Interview Questions
53 digital asic design engineer interview questions shared by candidates
Basic Verilog code questions, such as latch inferences, correct assignations (not mixing blocking/non blocking), FSM, etc
CDC and related concepts. Clock main issues, metastability, glitching, etc, and the possible solutions
Viewing 51 - 60 interview questions