where do you see yourself in 5 years
Asic Verification Engineer Interview Questions
273 asic verification engineer interview questions shared by candidates
Tell me about a class you like?
Basics on ddr verification and functional coverage
Write TB for one of the projects from past experience . Describe its features and implement DUT interface connections and build TB on whiteboard .
I don't think the questions are difficualt. Some coding related questions I didn't answered well, mainly because my passed experiences are more focusing on the hw design, not sw coding.
What's your name , is it [name] ?
There are block box modules, and you know nothing about what they are doing, behaior, output, input. Can you create a verification TB for it?
Q: Basics of system verilog classes, creating parent class object using child class handle, $cast concept. Fork-join processes, how is control handed to code outside the fork in the 3 cases; code a watch-dog timer to time out if an event does not occur by the end of certain transaction.
Digital electronics, Perl, Verification flow
What is difference between dynamic and associative array.
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