basic timing questions. I accepted the offer.3 rounds for contract position in VLSI Synthesis/STA all fundamentals are needed timing and synthesis prespective
Asic Engineer Interview Questions
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There are two large arrays filled with random 64-bit signed numbers. How do you determine what are the common numbers in the arrays? Give an algorithm that is linear in complexity. You can use unlimited memory.
how to generate a clock divide by 3
If you know system verilog. Write Fibonacci series. Can you reduce the variables?
what is the 3 Cs in cache miss?
question on clock gating- for an 8-bit wide register ,what are the different ways in which clock gating can be implemented to reduce overall power
Which gate would you prefer in a design? Nand or Nor? why?
Why would you use a Verilog Pre-processor?
1. sequence detector 2. get second largest number of a unsorted array 3. setup and hold time 4. some testing questions.
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