Based on algorithm implementation at hardware level.
Asic Engineer Interview Questions
1,316 asic engineer interview questions shared by candidates
Swap via value versus reference coding question. Design question about feeding data from producer to consumer (answer uses buffer)
What are you currently working on?
They asked me Static timing analysis question.
Have you built a library before
Ffs - implement it in rtl including 8 elements including how to test your answer . Find first set . First implement with gates than with system verilog there is many ways to solve this q
Computer architecture, cache coherence, CPU design, pipelining
Leetcode questions and verilog module coding.
They asked for the logic to get the maximum element in a shifted sorted array.
What is grey counter encoding and how is it used to overcome CDC?
Viewing 451 - 460 interview questions
See Interview Questions for Similar Jobs
Vlsi Design EngineerSenior Vlsi Design EngineerVlsi EngineerAsic Physical Design EngineerSenior Asic Design EngineerSoc Design EngineerRtl Design EngineerHardware Asic Design EngineerPhysical Design EngineerSenior Dft-ingenieurHardware Engineering ManagerHardware Asic Ontwerp IngenieurSenior Fpga Design EngineerFpga Design EngineerFpga Development EngineerSenior Hardware Design EngineerSenior Asic Fpga Design EngineerAsic Design Verification Engineer