1. Basics of CMOS. 2. FIFO 3. Digital Electronics.
Asic Engineer Interview Questions
1,315 asic engineer interview questions shared by candidates
Computer Architecture, FIFO depth calculation, how to design Power, Performance, or Area-efficient RTLs, also some questions regarding pipeline hazards.
Describe how you solved a problem on a project
Questions from OA will be asked
basic concept of pipeline state machine of sequence detector C program of a function about pattern replace
STA algorithms.
Phone interview Design gates using CMOS transistors. Build gates using 2-to-1 muxes. Write a verilog module that takes a clock signal and outputs another clock signal that is 3 times lower in frequency. The number of states required for a sequence recognizer.
Questions in digital design, timing violations, metastability
Sequence detecting FSM, coding it in Verilog
How does clock divide by 2 work
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