Current project architecture and role. SV and UVM related. SV constraint, coverage, assertions. UVM architecture and flow. Verification strategy related.
Asic Design Engineer Interview Questions
1,316 asic design engineer interview questions shared by candidates
Digital Design basics
explain about cache
What is a fpga and what is a lookup table?
ok. fifo..design n implementation.and other designing questions
The interview was straight forward and aveage
where do you see yourself in 5 years
Explain the working of a FIFO.
Tell us about interesting problems you uncounted and how you solved them
Tell about your self ? Tell about the ASIC flow ? and more over
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