I have a box with 4 enters that know if the number of '1' bigger or equal to 2. How can I build a box that find if the number of '1' bits bigger or equal to 3 / to 1?
Verification Manager Interview Questions
3,712 verification manager interview questions shared by candidates
In Verilog/SystemVerilog, write a module to detect if a binary representation of a number (of length 5) is palindrome or not
During the interview, I was asked several technical questions that tested both my low-level and high-level understanding. One of the questions required me to write multiplication code in assembly, which challenged my ability to think at the instruction level. Another question focused on the operation of moxies, testing my knowledge of architectural or system-level behavior. Additionally, I was asked a question related to verification, where I needed to demonstrate my understanding of validation methodologies and how to ensure the correctness of a design. These questions provided a well-rounded assessment of my skills.
All the interviewers are Indians and were really nice. I had a really good conversation each interview is about an hour. Everyone had a set of questions prepared and asking me to solve. 1. Full SV - fork join_none, virutal functions, $cast, static variable, Cache size - direct mapping, MESI FSM, constarints, parity check - post randomize 2. STA - hold violations, max freq, FIFO depth, metasibility 3. DUT - muti master muti slave bridge verification - draw the env and testcases, AXI signals 4. UVM - phases, AXI why not APB?, AXI lite vs. AXI 3.0, Driver code, coverage class and do cross coverage. 5. HR -> about team work, resources you used in a project, set back you faced. Explained most employee benefits, applying for H1B and green card, etc
Describe Cache coherence protocols, working of a 5 stage pipeline
How do you verify connectivity of an interface to memory with 6 bits of address and 6 bits of data? Show me a program that will write, read, and verify the connectivity.
Explain any verification projects that you have done , or projects you can apply the verification process and how?
how will u verify the functionality of an asynchronous fifo,dual port ram..
HOw do you debug config_db errors ? -- Py printing out the database contents
Memory - 4byte accessible --- constraint randomize and select one random memory address
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