2 signals, both only toggle once. At the first rising edge, start testbench; At the second falling edge, stop testbench. How?
Verification Interview Questions
3,716 verification interview questions shared by candidates
Memory Consistency
MOSEI protocol. Cache hierarchy.
Design clock gating in system verilog. Difference between verilog and system verilog.
Design an FSM for a 2-clock system
Computer architecture, some verification questions
There are block box modules, and you know nothing about what they are doing, behaior, output, input. Can you create a verification TB for it?
working independently then with team. Ease with translation for others and internet research. A lot of confidentiality.
What is gray code and 8b10b encoding, and why they are useful
Q. What are all run-phases and in detail discussion about it Q. Basic constraints related to dist, and assertion
Viewing 3081 - 3090 interview questions