UVM concepts, assertions, tb arch
Verification Interview Questions
3,719 verification interview questions shared by candidates
Questions were from computer architecture, cache verification, cpu and memory systems
Basic UVM questions, advanced systemverilog
Tell us a time that you faced a technical challenge and how you overcame it.
Question 1 : How do you verify a dual port memory Question 2 : What is layered constraints Question 3 : What is the use of UVM Question 4 : What is config db
What's pipelining? What's cache coherency?
What is verification and validation, describe your experience, now would you test this
Tell me about your latest project
My previous experience, basic assertions and fifo programming
Questions were from Digital electronics and other subjects
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