write a system verilog code to merge two sorted array and create a merged sorted array
Verification Engineer Interview Questions
3,713 verification engineer interview questions shared by candidates
Mainly riddles, about gates and other components
System Verilog and Formal Verification
Draw a FSM sequence detector
What is your greatest weakness?
Writing MIPS assembly code with hazards recursive function program
digital circuits and verilog , c language
Given an error message, what could be the issue.
Microprocessors, flipflops.
A design has 2 types of cmds - read and write packets. You need to send 10 back to back cmds through a sequence in such a way that after a write cmd was previously sent, you cannot immediately send a read cmd. However, the 1st cmd sent can be write cmd.
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