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Verification Engineer Interview Questions
3,718 verification engineer interview questions shared by candidates
Technical question about verilog code, simple code to finite state machine
Basic computer architecture questions, pipeline concepts and hazards. FSM for a sequence detector. Fibonacci using recursion and linked list reversal. Some scripting question which i could not answer.
The other 3 questions had design scenarios where I had to plan testcases to check their correctness...
Questions related to a verilog project I did in college.
How many times does the clock hands cross each other throughout the day?
Create an FSM for detecting a sequence
My previous experience, as well as a few mock examples related to verification and what my process would be
Asked questions on Risc-V pipeline, coding, verilog, etc.
each interview had at least 3 RTL design questions
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