Questions were from basic digital design (Flip flop, latch, MTTF etc), Computer architecture (Pipeline, Cache etc), basics of Verilog. The interviewer also about my graduate project and about my previous internship experience in detail. Interview went on for about 45 minutes. Overall good experience. The recruiter got back in touch after 10 days.
1. Comp Arch - Cache coherence protocols, Out of Order implementation 2. FSM design - coding 3. C program for 2nd smallest number in array
the aske me to plane a system to a factory who produce wood logs of two length - 49 meter and 51 meter . The system will get inputs from two sensors that are set when they "see" a wood log benith them. the sensorse are 1 meter apart whatching the platform of the factory. the factory is allways working and there is 1 meter gap between the logs on the platform.
A lot of timing related questions, (setup - hold) half/full adder
describe a digital logic system that realizes fibonachi serious
Actually i think there are all basic question .Since on phone they can not ask you to write a FSM or design something .Thus i think get better understanding of basic concept about Hardware/Software Design is important .
Most are normal digital design questions. I made mistakes and the interviewer helped me figure them out. The day after the second interview, they sent me a written simple question. It was about figuring out the power button logic, and making a rough design.
Tell me about yourself Technical Questions 1) Different ways to implement a mux in Verilog
How should technology be assessed
Given an excel sheet with a problem, optimize it given the setting and constraints.
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