Basic questions in VLSI design, digital design and a few high level questions in VLSI
Hardware Developer Interview Questions
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Design a counter in Verilog.
Vhdl code for D FF
Static timing analysis questions, dld questions and digital logic design questions
what is setup and hold time?
Create an FSM for detecting a sequence
Describe the digital circuit provided?
Design a circuit with 0V to 3.3V step at the input and negative 1ms pule at the output. Input: ___|----- CIRCUIT Output: -----|_____|------ Requirements: 1. Pulse,width,is,in,millisecond,range 2. Simple,and,low,cost 3. Indicate,every,component,used,clearly 4. Find,a,solution,that,does,not,use,logic, gates,,but,only,uses,transistors, (minimal,#,of,transistors) 5. Draw,a time,graph,of,all,of,the,nodes, in,the,circuit,that,are,switching.
Q: Numerical questions on FSM and Counters, verilog coding , c programming .
Several questions on experiences with prior SoC complexity.
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