what is casex and casez in verilog
Designer Ic Interview Questions
584 designer ic interview questions shared by candidates
They asked about a common source amplifier with degeneration, what is the gain with and without the degeneration resistor. For the second part of the same question the drain and the gate were tied together.
Asked about amplifiers, switched cap circuits, band gap, current mirrors
Given an analog integrator, what is the time domain response for a pulse Vin
for the MOS opamp, what happens if W is too large
Where is the largest resistance of the analog switch
explain compensation of basic op amp
draw an instrumentation amp input stage
construct a 3 input NAND from two input NAND gates
explain compensation of basic op amp
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