What is the difference between blocking and non-blocking assignments?
Design Verification Engineer Interview Questions
3,721 design verification engineer interview questions shared by candidates
I was asked to write system verilog constraints for a variety of random stimulus needs.
Questions on C++, Perl, System Verilog.
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Difference between Verilog and SV. Difference between blocking and non-blocking. Inheritance and virtual functions. Many C codes such as reverse an array, reverse bits of a number, get all even bits of a number, Fibonacci series, generate a random floating point number between a and b, Find a number in an array for which sum of all elements to its left= sum of all elements to its right. Few questions on digital logic such as finding minimum gates required for a given truth table, sequence detector, generate AND gate from 2 input mux etc.
Signaling concepts and hardware description of systems
Talk about a time you had to solve a problem you didnt know how to solve
Asked me about my CV, technical questions related to the role such as Python, testing, etc..
During the three interviews I was asked the following questions: -Tell us about yourself? -What are your weaknesses and strong points? -What do you think your role would be? -Are you good as an individual or a team? -If someone in your team doesn't meet the deadlines what will be your response? -How will you bring an idea to the team? -What would you bring to the team? -When someone criticizes you how would be your response (or how do you tackle that) to that? -Why you are interested in this position? -How will you fit in this position? -Did you have some questions for us? -How would you deal with the accuracy and fast-paced nature of the job? -What are your career ambitions/plans/motivations? -What do you think are the greatest challenges you would face during the job?
How have I managed to make quick decisions during critical moments?
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