Design Engineer Interview Questions

17,646 design engineer interview questions shared by candidates

During phone round, questions were asked from my resume and about my projects. During onsite, I had 5 rounds one round digital design questions ....not too tough one round white board solutions of a logical problem using some programming language ( even pseudo code works ) one round, to talk about my favorite project One round , lunch with a teammate ...mostly behavioral One round of scripting / Behavioral questions ( having scripting knowledge is helpful )
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Engineer, Staff-I, IC Design

Interviewed at Broadcom

3.3
Sep 18, 2015

During phone round, questions were asked from my resume and about my projects. During onsite, I had 5 rounds one round digital design questions ....not too tough one round white board solutions of a logical problem using some programming language ( even pseudo code works ) one round, to talk about my favorite project One round , lunch with a teammate ...mostly behavioral One round of scripting / Behavioral questions ( having scripting knowledge is helpful )

Can you draw a circuit to bias the gate of a cascode device? (No mention of supply limitation, threshold voltages, care in tracking PVT variations, or anything else. Just, draw a circuit to bias the gate of a cascode device.)
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Analog Design Engineer

Interviewed at Broadcom

3.3
Feb 16, 2011

Can you draw a circuit to bias the gate of a cascode device? (No mention of supply limitation, threshold voltages, care in tracking PVT variations, or anything else. Just, draw a circuit to bias the gate of a cascode device.)

What happens when you have a diff pair with a current mirror load on top and a tail current source on the bottom, and you sweep one of the diff pairs gate voltage (VX) from 0 to VDD while holding the other's gate voltage at VDD/2. Plot the two branch currents vs the gate voltage.
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Design Engineer

Interviewed at Silicon Labs

4.1
Oct 8, 2014

What happens when you have a diff pair with a current mirror load on top and a tail current source on the bottom, and you sweep one of the diff pairs gate voltage (VX) from 0 to VDD while holding the other's gate voltage at VDD/2. Plot the two branch currents vs the gate voltage.

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