1. How do you check if a system is little endian or big endian. 2. An rewind and commit type of FIFO of 256 depth you need to write testbench for.
Asic Design Engineer Interview Questions
1,316 asic design engineer interview questions shared by candidates
Tell me about a class you like?
Tell about your self ? Tell about the ASIC flow ? and more over
Do you have any experience about FPGA?
Some code test. Some system knowledge test.
Design a low pass filter
Design a CAM.
Asynchronous FIFOs. These guys love them.
Cmos transistors use in makin various gates
FIFO and Pipeline system.
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