Since I was interviewed for analog domain so they started with various first and second order systems and then asked to plot the respective borde plot and time domain response.
Analog Engineer Interview Questions
1,258 analog engineer interview questions shared by candidates
Parlami brevemente di te, capacitá di leadership e lavorare sotto pressione
Current mirrors Two capacitors connected in series
WPE, Poly Nwell cap Operation, LDO working and things to take care of.
Draw and comment a Bandgap Voltage reference.
How does the CMOS image sensor work overall? How does the column parallel ADC is designed?
In RC circuit , I was asked to draw the O/P graph for step impulse. Then adding one more capacitor in parallel of R. Asked the time constraint and O/P graph for step response.
Basic introduction about yourself,basics of verilog,projects,circuit fundamentals
Questions on opamp, CMOS inverter, rc circuits
1)What is Electromigration and how would ou resolve it? 2)What is ESD and how would ou fix it? 3) Some questions related to Clock Tree synthesis and timing. 4)Layout designing technique questions related to metal stacking, power rails, power aand timing optimization in analog layouts. 5)What is a latch-up condition and how would you fix it? 6)Difference between latches and flip flops and scenarios where they can be used. 7)Floorplanning strategies and questions related to particular process node layouts.(7 nm and 16 nm in my case.)
Viewing 1041 - 1050 interview questions