pass by value, pass by ref, function in c for fibonacci, pattern detector fsm, pipeline hazard
Asic Engineer Interview Questions
1,316 asic engineer interview questions shared by candidates
Mostly related to system verilog, verilog and in general Digital Logic.
Scripting (bash/python), basic VCS and CI/CD
Write a C program which finds the missing card among a set of 51 play cards.
c++ swap, pipeline
They asked me one question related to my project in verilog, that is how to make a digital clock using verilog in a FPGA board. They then asked me about counters and all. They also asked some questions related to CMOS, one question they asked from the OT and at last they asked me one brain puzzle.
Design a MUX using only NOT, AND and OR gates
What is clock domain crossing?
Constraint randomization based question linking to AXI and memory filling
Write the verilog code for a counter then change reset to asychronized.
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